Generalize Exercise if the pMOS transistors have μ times the effective resistance of nMOS...

Generalize Exercise if the pMOS transistors have μ times the effective resistance of nMOS transistors. Find a general expression for the logical efforts of a k input NAND gate and a k-input NOR gate. As μ increases, comment on the relative desirability of NANDs vs. NORs.

Exercise

Consider a process in which pMOS transistors have three times the effective resistance as nMOS transistors. A unit inverter with equal rising and falling delays in this process is shown in Figure Calculate the logical efforts of a 2-input NAND gate and a 2-input NOR gate if they are designed with equal rising and falling delays.

FIGURE : Unit inverter