Problem

The design of a circuit that counts the number of ones in a register is carried out in S...

The design of a circuit that counts the number of ones in a register is carried out in Section 8.10. The block diagram for the circuit is shown in Fig. 8.22 (a), a complete ASMD chart for the circuit appears in Fig. 8.22 (c), and structural HDL models of the datapath and controller are given in HDL Example 8.8. Using the operations and signal names indicated on the ASMD chart,

(a) Write Datapath_BEH, an RTL description of the datapath unit of the ones counter. Write a test plan specifying the functionality that will be tested, and write a test bench to implement the plan. Execute the test plan to verify the functionality of the datapath unit, and produce annotated simulation results relating the test plan to the waveforms produced in a simulation.

(b) Write Controller_BEH, an RTL description of the control unit of the ones counter. Write a test plan specifying the functionality that will be tested, and write a test bench to implement the plan. Execute the test plan to verify the functionality of the control unit, and produce annotated simulation results relating the test plan to the waveforms produced in a simulation.

(c) Write Count_Ones_BEH_BEH, a top-level module encapsulating and integrating Controller_BEH and Datapath_BEH Write a test plan and a test bench, and verify the description. Produce annotated simulation results relating the test plan to the waveforms produced in a simulation.

(d) Write Controller_BEH_1Hot, an RTL description of a one-hot controller implementing the ASMD chart of Fig. 8.22 (c). Write a test plan specifying the functionality that will be tested, and write a test bench to implement the plan. Execute the test plan and produce annotated simulation results relating the test plan to the waveforms produced

in a simulation.

(e) Write Count_Ones_BEH_1_Hot, a top-level module encapsulating the module Controller_ BEH_1_Hot and Datapath_BEH . Write a test plan and a test bench, and verify the description. Produce annotated simulation results relating the test plan to the waveforms produced in a simulation.

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Solutions For Problems in Chapter 8