Let ρ(g, p) be the best stage effort of a path if one is free to add extra buffers with a...

Let ρ(g, p) be the best stage effort of a path if one is free to add extra buffers with a parasitic delay p and logical effort g. For example, Section 4.5.2 shows that ρ(1, 1) = 3.59. It is easy to make a plot of ρ(1, p) by solving EQ (1) numerically; this gives the best stage effort of static CMOS circuits where the inverter has a parasitic delay of p. Prove the following result, which is useful for determining the best stage effort of domino circuits where buffers have lower logical efforts:

(1)