Question

A vending machine sells a variety of snacks for $0.65; it only accepts dollars. It provides $0.35 in change in nickels, dimes and quarters, using the smallest number of coins possible. The change controller takes inputs from a quarter counter (1-bit), dime counter (2-bits), and nickel counter (3-bits). It outputs the number of quarters (1-bit), dimes (2-bits) and nickels (3-bits) to be dispensed, or asserts "no change" (1- bit) if the machine is unable to make exact change. Design a circuit that implements the change controller using SOP form. Be sure to show truth tables, K maps, and reduced equations. Describe your circuit using a Verilog behavioral dataflow description and simulate it by writing a testbench. Assume the device has a propagation delay of 5 time units You can compile and simulate your Verilog program using the Verilogger software system or any other Verilog environment. Save and print the simulator timing diagram so that you can include it in your final report After you get your behavioral dataflow model working and verified, create a Verilog structural description for the same design and verify it. You may use any of the actual logic gates in the 74HCT family. Be sure to model your design using actual 74HCT family propagation delay values for the devices you chose. This means specifically that your Verilog program must assign tPLH and tPHL values to every gate. You can get these from the 74HCT data sheets, which can be found on the Texas Instruments web site (www.ti.com)-click on "Logic" under Find Products. Some are also available via links on the course page. You do not need to use SOP form for the structural description, but if the logic you implement for the structural description differs from the equations you obtained for the dataflow model, you need to show how you derived them. Note that this means that your total propagation delay will be determined by actual devices and will differ from the dataflow design you did. You can use the same testbench that you used to verify your dataflow description (though you may need to change the timing).

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