Question

The following figure shows how to construct a module of chips that can store 1 MB...

The following figure shows how to construct a module of chips that can store 1 MB based on a group of four 256-Kbyte chips. Let’s say this module of chips is packaged as a single 1-MB chip, where the word size is 1 byte. Give a high-level chip diagram of how to construct a 8-MB computer memory using 8 1-MB chips. How many memory addresses lines do you need (In the example, it is 20 lines -MAR)?

Question 8 options:

A

20

B

27

C

23

D

25

Question 9 (3 points)

For a given computer system, the main memory is 256Mbyte (=2^28 Bytes); word size is 4 bytes (=2^2 Bytes); block size is 64 bytes (2^6 bytes); cache size is 64 Kbytes (2^16 Bytes). When direct mapping is used as the mapping function, how many bits is needed to be the tag?

Question 9 options:

A

10

B

16

C

18

D

28

0 0
Add a comment Improve this question Transcribed image text
Answer #1

1. 20 bits is the length of memory address.Total size of the memory is 1 MB=1*210*210

So 20 memory address lines are needed.

Data bus width is 8 bit since the word length is 1 byte.

2. Memory address is 28 bit,since the size of memory is given as 256MB.

It is given that cache size is 64 Kbytes and the block size is 64 bytes.So total number of blocks=64K/64=1K=1024.

So 10 bits are needed to recoganize one block(210=1024)

Out of 28 bit,10 bits are needed to identify block,2 bits for word and the remaining 16 bits are for tag.So answer is option B.

Add a comment
Know the answer?
Add Answer to:
The following figure shows how to construct a module of chips that can store 1 MB...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • Please refer the following memory system : Main memory : 64 MB Cache memory: 64 KB...

    Please refer the following memory system : Main memory : 64 MB Cache memory: 64 KB Block size of 1 KB 1. Direct Mapping Offset bits? Number of lines in cache? Line number bits? Tag size? 2. Fully Associative Mapping Offset bits? Tag size? 3. 2-way set-associative mapping Offset bits? Number of lines in cache? Set number bits? Tag size? 4. 4-way set-associative mapping Offset bits? Number of lines in cache? Set number bits? Tag size?

  • Example 4.2 For all three cases, the example includes the following elements: The cache can hold...

    Example 4.2 For all three cases, the example includes the following elements: The cache can hold 64 Kbytes. Data are transferred between main memory and the cache in blocks of 4 bytes each. This means that the cache is organized as 16K = 214 lines of 4 bytes each. The main memory consists of 16 Mbytes, with each byte directly addressable by a 24-bit address (24 = 16M). Thus, for mapping purposes, we can consider main memory to consist of...

  • Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of...

    Problem 6. Suppose we have a computer with 32 megabytes of main memory, 256 bytes of cache, and a block size of 16 bytes. For each configuration below, determine the memory address format, indicating the number of bits needed for each appropriate field (i.e. tag, block, set, offset). Show any relevant calculations. Direct cache mapping and memory is byte-addressable a) Direct cache mapping and memory is word-addressable with a word size of 16 bits b) c) 2-way set associative cache...

  • For a given computer system, the main memory is 256Mbyte; word size is 4 bytes; block...

    For a given computer system, the main memory is 256Mbyte; word size is 4 bytes; block size is 64 bytes; cache size is 64 Kbytes. what is the number of cache line? Question 3 options: A 64Kbyte/4bytes B 256Mbyte/4bytes C 256Mbyte/64bytes D 64Kbyte/64bytes Question 4 (3 points) Consider a magnetic disk drive with 8 double sided platters, 2000 tracks per disk surface. Each track has a capacity 2048 KBytes. Sector size is 2KBytes. What is the capacity of acylinder? Question...

  • If you were to build the cache memory from problem 1 (provided below), what is the...

    If you were to build the cache memory from problem 1 (provided below), what is the total size (in bytes) required for this cache memory? The total size includes data, tag, and valid bit chips. Hint: your solution might not be a power of 2. Total cache memory is 128k bytes Cache block size is 4 words (1 word = 4 bytes) CPU address window = 32 bits Cache memory chip size = 4k x 8-bits

  • A computer system has a 64 KB main memory and a 4 KB (data area only) cache. There are 8 bytes/ca...

    A computer system has a 64 KB main memory and a 4 KB (data area only) cache. There are 8 bytes/cache line. Determine (1) the number of comparators needed and (2) the size of the tag field, for each of the following mapping schemes: a. Fully associative A computer system has a 64 KB main memory and a 4 KB (data area only) cache. There are 8 bytes/cache line. Determine (1) the number of comparators needed and (2) the size...

  • Assume the cache can hold 64 kB. Data are transferred between main memory and the cache...

    Assume the cache can hold 64 kB. Data are transferred between main memory and the cache in blocks of 4 bytes each. This means that the cache is organized as 16K=2^14 lines of 4 bytes each. The main memory consists of 16 MB, with each byte directly addressable by a 24-bit address (2^24 =16M). Thus, for mapping purposes, we can consider main memory to consist of 4M blocks of 4 bytes each. Please show illustrations too for all work. Part...

  • A computer system has a 64 KB main memory and a 4 KB (data area only) cache. There are 8 bytes=ca...

    A computer system has a 64 KB main memory and a 4 KB (data area only) cache. There are 8 bytes=cache line. Determine (1) the number of comparators needed and (2) the size of the tag field, for the following mapping scheme: Direct.

  • Q3. A computer has 128 MB of main memory organized logically as 32M blocks of 4...

    Q3. A computer has 128 MB of main memory organized logically as 32M blocks of 4 bytes each. It has a cache memory of 16 KB. Answer the following questions: a. How many address lines are required to access the main memory? [1 Mark] b. Determine how to split the address (s-r, r, w) for Direct Mapping. [2 Marks] c. Determine how to split the address (s-d, d, w) for 2-way set-associative mapping. [2 Marks]

  • Question 12 Consider a magnetic disk drive with 10 double sided platters, 512(=2^9) tracks per surface,...

    Question 12 Consider a magnetic disk drive with 10 double sided platters, 512(=2^9) tracks per surface, and 1024 (=2^10) sectors per track. Sector size is 2KBytes (=2^10 Bytes ). Assume the average seek time 0.02 ms, the seek time from a track to its adjacent track can be ignored. The drive rotates at 5400 rpm. Successive tracks in a cylinder can be read without head movement. Furthermore, disks can be handled independently, so multiple tracks in a cylinder can be...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT