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Part 1: Using PSPICE, simulate a CMOS logic circuit that produces the complement of function A+BC....

Part 1: Using PSPICE, simulate a CMOS logic circuit that produces the complement of function A+BC.

(a) In a truth table, provide the voltage levels for high and low inputs and outputs

(b) Using a DC sweep on one of the logic inputs, produce the voltage transfer curve of the circuit when switching from input high to input low. Determine the noise margins of the circuit.

part 2: Modify the circuit from Part 1 to be a clocked CMOS circuit that produces the same logic function.

(a) In truth tables, provide the voltage levels for high and low inputs and outputs when i) clock is set to logic ‘1’ and ii) clock is set to logic ‘0’

(b) Using a DC sweep on the clock input, produce the voltage transfer curve of the circuit when the inputs are set to produce a logic high and the clock switches from logic ‘0’ to logic ‘1’. Determine the noise margins of the circuit for this transfer curve.

Needed:

Circuit diagrams for Parts 1 & 2 in the schematic diagram title field

Truth tables for Part 1(a) and Part 2(a) cases i) and ii).

PSPICE output plots for the voltage transfer characteristics for Parts 1 & 2

A table of the noise margins determined for Part 1(b) and Part 2(b)

pspice required

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