Question

Consider a system with 24 bit addresses, 128 KB cache with 32 byte lines using direct...

Consider a system with 24 bit addresses, 128 KB cache with 32 byte lines using direct mapping. Divide the address below labeling each part of the address and specify the size of each field in bits.

Tag? Line? Offset?
0 0
Add a comment Improve this question Transcribed image text
Answer #1

ANSWER:

GIVEN THAT:

GIVEN 24 BIT ADDRESSES, 128 KB CACHE WITH 32 BYTE LINES USING DIRECT MAPPING:

1. Cache memory size = 128 KB

2. Block size = Frame size = Line size = 32 bytes = 28 bits = 8 bits is the line size

3. Line Number = cache size / line size = 128 kb/ 8 bits = 214 bits = 14 bits is the Line number

4. Tag = System address bits -(Block size + Line Number) = 24-(14+8) = 2 Bits Tag

5.

Tag = 2 bits

Line number = 14 bits offset / block size = 8 bits
Add a comment
Know the answer?
Add Answer to:
Consider a system with 24 bit addresses, 128 KB cache with 32 byte lines using direct...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • Question 28 7 pts Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing...

    Question 28 7 pts Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64K bytes of data, and blocks of 32 bytes. If the computer uses direct mapping, the format of the memory address is as follows: bits for the tag field, bits for the cache block number, and bits for the block offset.

  • Consider a 32 KiB (not KB) cache in a system where the processor uses 64-bit words....

    Consider a 32 KiB (not KB) cache in a system where the processor uses 64-bit words. The system use the byte address of 36-bits. Each cache line (block) stores 256 bits. a) How many bits are used as the byte offset (b)? How many bits are used as the block offset (m)? b) How many index bits are used? How many blocks (lines) are available in the cache? c) Consider the cache being organized as direct-mapped cache. How many bits...

  • ) Consider an 8-way associative 64 Kilo Byte cache with 32 byte cache lines. Assume memory...

    ) Consider an 8-way associative 64 Kilo Byte cache with 32 byte cache lines. Assume memory addresses are 32 bits long. a). Show how a 32-bit address is used to access the cache (show how many bits for Tag, Index and Byte offset). b). Calculate the total number of bits needed for this cache including tag bits, valid bits and data c). Translate the following addresses (in hex) to cache set number, byte number and tag (i) B2FE3053hex (ii) FFFFA04Ehex...

  • Please refer the following memory system : Main memory : 64 MB Cache memory: 64 KB...

    Please refer the following memory system : Main memory : 64 MB Cache memory: 64 KB Block size of 1 KB 1. Direct Mapping Offset bits? Number of lines in cache? Line number bits? Tag size? 2. Fully Associative Mapping Offset bits? Tag size? 3. 2-way set-associative mapping Offset bits? Number of lines in cache? Set number bits? Tag size? 4. 4-way set-associative mapping Offset bits? Number of lines in cache? Set number bits? Tag size?

  • 16 It is known that computer system programs use 32-bit virtual addresses to access storage units....

    16 It is known that computer system programs use 32-bit virtual addresses to access storage units. If the physical memory space of the computer system is 1GB, and the paging management mechanism is adopted, the page size is 4KB, and each page table entry is 4B. If only one level of page table is used to realize the mapping from virtual address to physical address, how much memory space does the page table occupy? A. 1MB B. 4KB C. 1KB...

  • Consider a processor that has a 20-bit address and a 1K Byte Cache. The cache and...

    Consider a processor that has a 20-bit address and a 1K Byte Cache. The cache and main memory are divided into blocks where each block is 256 Bytes. If direct mapping is used, what is the tag size of each block in cache and how many tag comparisons are made for a one-cache access? Repeat part (1) for fully associative mapping. Repeat part (1) for 2 way set-associative cache. For the direct map find out which of the following accesses...

  • For a 16K-byte, direct-mapped cache, suppose the block size is 32 bytes, draw a cache diagram....

    For a 16K-byte, direct-mapped cache, suppose the block size is 32 bytes, draw a cache diagram. Indicate the block size, number of blocks, and address field decomposition (block offset, index, and tag bit width) assuming a 32-bit memory address.

  • Memory Hierarchy and Cache Consider a computer with byte-addressable memory. Addresses are 24-bits. The cache is...

    Memory Hierarchy and Cache Consider a computer with byte-addressable memory. Addresses are 24-bits. The cache is capable of storing a total of 64KB of data, and frames of 32 bytes, Show the format of a 24-bit memory address for: a- Direct mapped cache b- 2-way associative cache c- 4-way associative cache d- For each type of cache above, indicate where would the reference memory address 0DEFB6 map

  • Assume the cache can hold 64 kB. Data are transferred between main memory and the cache...

    Assume the cache can hold 64 kB. Data are transferred between main memory and the cache in blocks of 4 bytes each. This means that the cache is organized as 16K=2^14 lines of 4 bytes each. The main memory consists of 16 MB, with each byte directly addressable by a 24-bit address (2^24 =16M). Thus, for mapping purposes, we can consider main memory to consist of 4M blocks of 4 bytes each. Please show illustrations too for all work. Part...

  • 29 pls clesr ans the average access time for the processor to access an item? 29ns...

    29 pls clesr ans the average access time for the processor to access an item? 29ns Question 29 7 pts Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64K bytes of data, and blocks of 32 bytes. If the computer uses direct mapping, the format of the memory address is as follows: bits for the tag field, bits for the cache block number, and bits for the block offset. Question 30 7 pts...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT