Register Transfer notation:
Please explain in detail, thank you:)
Homework Answers
since PC=7FFh which means program counter contain address of instruction to be executed.
explanation of register transfer notation of ISZ ( increment and skip if zero):
T4::DR ← M [AR]
T5::DR ← DR + 1
T6::M [AR] ← DR, if (DR = 0) then (PC ← PC + 1), SC ← 0
This instruction increments the word specified by the effective address, and if the result is zero, PC is incremented by one.
When PC is incremented by one, the next instruction in the sequence is skipped.
this is the interpretetion of the above instruction code given for the ISZ.
(note- SC is sequence counter)
1. The clock transition associated with timing signal T4 read the memory into DR.
2. The clock transition associated with timing signal T5 increments DR.
3. The clock transition associated with timing signal T6 store the word back into memory. In the same clock transition, SC is cleared to 0 which transfers the control to timing signal T0 to start a new instruction cycle.
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