Write a Verilog dataflow description of the logic circuit described by the Boolean funct...

Write a Verilog dataflow description of the logic circuit described by the Boolean function in Problem 4.35.

Reference: Problem 4.35

Implement the following Boolean function with a 4 × 1 multiplexer and external gates.

Connect inputs A and B to the selection lines. The input requirements for the four data lines will be a function of variables C and D . These values are obtained by expressing F as a function of C and D for each of the four cases when AB = 00, 01, 10, and 11. These functions may have to be implemented with external gates. (HDL—see Problem 4.47.)