Write the HDL gate-level hierarchical description of a four-bit adder–subtractor for uns...

Write the HDL gate-level hierarchical description of a four-bit adder–subtractor for unsigned binary numbers. The circuit is similar to Fig. 4.13 but without output V . You can instantiate the four-bit full adder described in HDL Example 4.2 . (HDL—see Problems 4.13 and 4.40.)