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5. (20 Points) Given the logie circuit below, with the decoder having active low outputs as shown. Find the minimum switching digital logic design
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Answer #1

mo Y B Fc 50 f(W, X, Y, 2) Wto 60 la IS

+ ( x, y, ), к+L = (-га-т, па) + (- Па - т, а то (т. mo.ma mo.ma my). mo.ma •ma miz [De-morganis lous - (то Ama + mo aña) (mo

Now we use minterms to solve further f(W, X,Y,Z) = W X Y Z + WXğ z + (W X Y Z + W X YZ). 1 xyz = w x y z twi Tz + (wie (E+4).

We will first minimise the equation using demorgan laws.
Then we will use minterms to solve further and get the SOP(sum of products)

Please do comment for any queries.
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Thank You.

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