5. (20 points) Given the logie circuit below, with the decoder having active low outputs as...
5. (20 points) Given the logie circuit below, with the decoder having active low outputs as shown. Find the minimum switching expression for f(W,X,Y,Z) in the SOP form. 46 SP WXYD) w 9 4-10-16 10 Decoder 11 12 GI 13 14 150
digital logic design 5. (20 Points) Given the logie circuit below, with the decoder having active low outputs as shown. Find the minimum switching expression for f(W,X,Y,Z) in the SOP form. Y EXY х w 4-6-16 10 Decoder GI 12 13P 14 150 I D G Search or type URL 5 6 & 7 8 9 0
3.41 Given the circuit below, find the minimum SOP expression for f(W,X,Y,Z). 4-10-16 Decoder 1 NO ZA ܩܘܩܩܩܩܩܩܩܩܩܩܩܩܩܩ
1 Consider 4-to-16 Decoder. Assume that the decoder outputs are given below. What is the logical function of F in canonical SOP form, that the decoder actually implements. * D (5 Points) do = dz = ds = dy = dg = do = dio = du = die = djs = 0, and others are binary 1 OF = m(0,3,4,7,8,9, 10, 11, 14, 15) O F = ] M (0,3,4,7, 8, 9, 10, 11, 14, 15) O F =...
1. Provide the function table of a 3-to-8 active-low output decoder with active-low enable input. 2. A function f (D,C,B,A) is synthesized by a 4-to-16 decoder as in Figure 1. Derive the canonical SOP expression for the function f(D,C,B,A). AO (LSB) B-1 C-2 f(D,C.B.A) (LSB) ib 2 b 3 45 5 6b 7b 8b 3 ( MSB) 9 p 10 11 b 12 b 13 d EN 14 b ( MSB) 15 D Figure 1
using five(5),2 to 4 line decoders with active low enable inputs and active low outputs, and a 4 input NAND gate, draw the circuit diagram that implements the following function. F(W,X,Y,Z) = (Z( W'( X'Y +XY')+W(XY+XY')
2. [20 points] A circuit with 4 inputs has to realize the following 3 functions z, w)-n (0, 1,3,4,9, 11) g (x, y,z, w)-2 (5, 8,9, 10, 11, 12, 13, 14, 15) In what follows the cost a circuit is defined as: Number of gates used + mumber of inputs to these es but not counting NOTs. So, assume that input variables are available in both complemented and un-complemented forms. (a) [10 points] Find simple SOP expressions using K-maps for...
please solve number 2 and number 5 MA OTKR) Practice-5 variable K-Map.pdf At 1.38 MB) Use Kamaugh maps to design lowest cost circuits for the following function with NOT, AND dort gates. To find the lowest costs add to the both the SOP form of the circuit and POS form of the circuit and compare their cost to find the best cast circut House Karnaugh maps for both SOP and Pos forms and then cotain the simple expression by covering...
les K-Map.pdf A (1,0231707 KB) Practice-5 variable K-Map.pdf A (1.868 MB) Use Karnaugh maps to design lowest cost circuits for the following functions with NOT, AND and OR gates. To find the lowest cost, it is a good idea to check both the SOP form of the circuit and POS form of the circuit and compare their cost to find the lowest cost circuit. Hint: Use Karnaugh maps for both SOP and Pos forms and then obtain the simplified expression...
Question-20 5 points Capacitors Cz, C2 and Cz are connected as shown in the circuit below. The equivalent capacitance between points A and B is: C1 a. 16 nF b. 11 nF C. 0.77 nF d. 0.1 nF 1nF C2 10nF C3 InF Question-21 5 points The impedance, Z of a 10 mH inductor at a frequency of f = 1000 Hz, expressed as a complex number is a. –j 62.83W b. +j 62.83W C. –j 10W d. +j 10w...