Question

Please help me out. Give me a detail explanation for this !!

Repeat part (1) except assume that the cache is 2-way set associative with an LRU replacement policy and 16-byte sets (8-byte blocks). 3. (cache) Consider the following code: (20 points) (1) Assume that the system has a 8192-byte, direct-mapped data cache with 16-byte blocks. Assuming that the cache starts from initial state (i.e. initially empty), what is the series of data cache hits and misses for the above code (i.e. number of misses and number of hits)? Assume that the ints are 32-bits.

  

( repeat one is a subquestion.. please do it if you can but, understand if you dont solve the sub question one )

Answer 1

Each Blocj has 16-bytes or 4-ints
Since the cache is a direct mapped one.
for the first loop ,
one in 4 elements causes a miss.
Sequence: Miss,.....

Number of misses= 1024/4=256
Number of Hits=768

For the second loop:
2048*4=8192 bytes which is the capacity of he direct mapped cahce
Therefore
A[i+2048] is again mapped starting from 0 onwards.
So the sequence is same above: miss, Hit,....
Number of missess= 1024/4=256
Number of Hits=768
Total number of ,isses=512
Number of Hits=1536