Explanation:
The output of N1 and N2 is equal to low for the low logic input.
The output of P1 and P2 is equal to low for the high logic input.
The output of N1 and N2 is equal to high for the high logic input.
The output of P1 and P2 is equal to high for the low logic input.
The second part of the circuit provides 'NOT' operation.
If either 'P1' or 'P2' os high , the output of P3 is low. then Y=0.
If both P1 and P2 are equal to zero, then the output of P3 is high and Y=1.
Tabulation:
3. (6 pts) The following figure shows a transistor-level logic gate for AND gate. Complete the...
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