Question

Name: Problem 3. (10 pts) For the following FSM, write down its state transition and output tables, and sketch the state transition diagram. If the state transition table can be simplified, you should simplify the table. The FSM has two state bits SO and Si. Use S0* and S1* to represent next state bits. Input A DE Output Y Clock A SO S1 S0* $1* Y

Answer 1

Giren sequential circuit of Ism have two o-flip flops with inputs DO,DI and Qutput: so, s1 gespectively It hase one external Binary opt output iq fom output y. and one input A along with clock input. The Flip flop outputs 50,51 are used fer state represent - tation and using two state bits so, si possible number of states are 50,51 = 00, 09,10,117 * Let next states be so*, si* and are equivalent to O- flipflop inputs as o-flipflops Considered. so * = DO, SIT -01 * * Boolean Boarea espossessions expressions for for next states i flip flop inputs are I DO = I ol = (50 +51) A Asi - * Boolean expressions for output y is 1 Y = A SIG 507 * Assuming Initial state after Reset E8 sous1=00 and circuit triggered on positive edge Occurance of clock, next state transition table and stale transition diagram derived below:

State Transition table Input Present stales Nent states Deutput SO SI So * si* A 0 o 0 - Oo - - - - OOO-. 0 1 0 - Stale Transition diagram Initial state After Reset / Sos LOO ACO SOSI 11 A-0 420 uz Sos SOSIY Az