Question

I NEED THE LOGISIM CIRCUIT DESIGN!

NYIT. Digital Logic Fundamentals, Dr. S. Ben-Avi. Spring 2019. An Excess-3 code exists for the following reason: The primary advantage of excess-3 coding over non-biased co ding is that a decimal number can be nines' complemented (for subtraction) as easily as a binary number can be ones' complemented: just by inverting all bits it's useful We shall be discussing complement systems again later in the course - just know that this o Design logic to accept 4 inputs A. B, С and D which is a number in the range O to 9. Inputs 10 to 15 will ne your circuit so the corresponding cells in the Karnaugh map will be "don't cares"(X). (Budget, 4 ver pins per circuit total for input. I don't want several separate circuits). The outputs will bew.Х. Y and Z, representing, in binary, the input number plus three Line up your outputs in a line horizontally, from left to right W (8's). X(4's). Y (2's) and Z (I's). This is the final design and smulation that is combinational. Counters next,then multiplexers. So, fill out the table below knowing that "D" is the "eights" of the inputs and that "W" is the eights of the outputs. Design and implement a minimal circuit with D, C, B. A as inputs (4 pins only total appearing on your circuit) which should be displayed on l.e.d.s, and outputs W. X. Y and Z, which should also be displayed on le.d.s. Use the LABEL property for pins and Le.d.s to place a meaningful label on inputs and outputs. There is a budget of only 4 pins and only 4 inverters. DO NOT USE MORE THAN THIS BUDGET TOTAL FOR THE WHOLE CIRCUIT This will be the last of the combinational circuits that you design and simulate Fill out this truth table: 0 NAME AND ID: AB CD 00 01 10 CI 10 01 01 14 13 10 CD 00 01 10 CD00 01 01 10 10 AB CD 00 01 0001 10 01 10 10 Keep AND terms in alphabetical order: Penalty if not. Industry standards. Y- LOOP YOUR MAPS.SUBMIT THIS PAGE class 04/12/2019 next week Friday anyway. Hand in: this page pue in class . The truth ta . d maps and Mi Make sure that you can honestly check and confirm ALL of the conditions for acceptance on this page. Simulate in Logisim. Take 2 screen shots for inputs zero and nine DCBA 0001 and 1001. NOTE THAT LOGISIM TEXT BOXES CANNOT TAKE A LINE BREAK!! Use 2 boxes or more. Your Name: Your I.D. shots contain text boxes with your name and ID. Also label D.C.B.A, W.x.Y and z Your screen shots contain text boxes for the equations for W, X, Y and D Inputs 10 through 15 are marked as don't cares on the Karnaugh Maps. I have used them to benefit the minimization. Your variables in AND "product") terms are in alphabetical order You have drawn the Karnaugh map loops on the maps, clearly marking them. Loops are as large as they can be, and you have the smallest possible number of them. You have looped "I"s, for this exercise. Your name is on the paper. You are presenting a neat and readable paper. If a circuit is required, I have unchecked in Logisim-evolution WINDOW PREFERENCES LAYOUT THIS IS YOUR WORK ONLY. ATTACH THIS SHEET. "Printer View" under I have rechecked my work and made SURE that my loops are as large as possible, AND there are no unnecessary loops You have used input A as the I.s.b. and input D as the m.s.b. . If you have not STAPLED all your sheets, do not submit. No paperclips or folded down corners. .If you cannot check all of the boxes above, do not submit. . If you have not simulated the circuit in Logisim, do not submit. . If you have not attached by staple 2 print-outs of the Logisim circuit, do not submit. . If your name and ID is not on all sheets, do not submit. . Late submissions will not be accepted. . If you have not checked the boxes above, your submission will not be accepted. . If your submission is found to not comply with the checked boxes, your grade will be reduced by one letter Do not email your solutions, please. This is also a test of your ability to present professionally, as required by ABET

Answer 1

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