Using your preferred HDL program (specifv, do not mix), write code for the following modules: i) ...

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WRITE IN SYSTEM VERILOG:

Using your preferred HDL program (specifv, do not mix), write code for the following modules: i) a 1-bit half adder (HA). ii)

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Osing System lefilo (1) a l-bit halt addex (HA) Output LoƠic endnodale omd AR- Full adder osïrg Hal odder ti L2 Couut 43 module FA ( HA ua, b, tt); ciA 7esbench code to chacr ot thuo above FA. modale tes l r) 杜 2 Cint 1, #10. en endmed l

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