Question

Problem 2. Ripple Carry and Carry Look-ahead Adders For the binary adding circuit that adds n-bit inputs x and y, the following equation gives ci+1 (the carry out bit from the i" position) in terms of the inputs for the ih bit sum x, yi, and ci (the carry-in bit): Letting gi xiyi and pi = xi+yi, this can be expressed as: ci+1 = gi+piCi a) In a ripple carry adder structure, the carry bits are computed sequentially. That is, ci is computed first, then the result for c, is used to compute c2, and so on. For a 3-bit ripple carry adder in which each c is implemented in sum-of-products form (as in the first equation for c+ above), how many gates delays will be incurred in calculating c? b) In a carry-lookahead adder, the idea is to reduce the delay by calculating each carry bit directly from the multi-bit inputs x and y plus the carry-in bit co. For a 3-bit carry-lookahead adder, derive the expression for c3 in terms of the 3-bit inputs x and y and the carry-in bit co. You must show the steps of the derivation, not just give the final expression. You should give your answer in terms of intermediate variables gi and pi as given above. c) For the carry-lookahead adder method, assuming that the intermediate variables gi and pi are computed and then used to produce c3, how many gate delays will be incurred in calculating c3?

Answer 1

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