The bias voltages of the diff-amp circuit shown in Figure 11.19 are V+ = 5 V and V− = −5 V...

The bias voltages of the diff-amp circuit shown in Figure 11.19 are V+ = 5 V and V− = −5 V, and the bias current is IQ = 0.2 mA. The transistor parameters are VTN = 0.4 V, Kn = 0.15 mA/V2, and λ = 0. (a) Design the circuit such that a differential-mode output voltage of ∆vO = 0.5 V is produced when a differential-mode input voltage of vd = v1 − v2 = 100 mV is applied, (b) Using the results of part (a), determine the maximum possible common-mode input voltage that can be applied such that the transistors remain biased in the saturation region.