Question

Anyone want to be a class hero? Our entire class is stuck and the professor isn't responsding (and its due soon). We can't figure out how to connect our four outputs of the multiplexers to a single four input decoder in a way that causes the two seven segment displays to alternate (see instructions). I understand the idea is that we set the clock to a very high frequency so it looks like they are both on when they are actually alternating. We're not looking for an answer, just a general idea as to where to go from here.

Again, if anyone can help that'd be great (see task 2)!

Task 1: One implementation of a multiplexer uses a decoder. Using Logic Circuit, create a new schematic, import one of the decoders created in a previous lab and create a logic circuit that implements the truth table below 0 xD0 x D1 xD2 x D3 1 00 x 1 01x Task 2: Create a logic circuit that can display two 4-bit digits on two 7-segment displays using a single 7-segment display decoder and 4 multiplexers. To do this you will use four switches to enter the first number, and a second set of four switches to enter the second number. The first set of switches will connect to the DO input on the four multiplexers. The second set will connect to the D1 inputs on the same multiplexers. (In this task, nothing will be connected to D2 or D3) The clock signal will be used as the first selection bit on the multiplexers. Import the 7-segment display decoder created in a previous lab. Connect the output of the multiplexers to the inputs on the 7- segment display decoder. Connect the output of the decoder to two 7 segment displays. Use the clock to enable one display when it is high and the other when it is low. (Hint: a fifth multiplexor maybe helpful here) ask 3: Connect two additional 7 segment displays to the output of your decoder. Connect the first set of switches to the D2 inputs of the multiplexers, but in reverse order from task 2. (e.g. if SW0 was connected to MUXO and SW3 was connected to MUX3, then SW0 would connect to MUX3 and SW3 would connect to MUXO) Similarly, connect the second set of switches to the D3 inputs of the multiplexers. At this point, all four inputs of the multiplexers should be connected Connect a single button to the second select bit of all the multiplexers. When this button is pushed, disable the two digits that were displayed in task 2 and allow the clock to enable one of the two previously disabled digits Include screenshots of all schematics when handing in your lab and answer the questions below Questions 1. What would you see on the display if the clock was running at a frequency of 1/4 Hz? 2. What would you see on the display if the clock was running at a frequency of 100 Hz? If this was on a physical device (not a simulation) what would happen if the clock was running at 50 MHz? Explain why this is. (Hint: Think of the segments of the display as simple LEDs that are not ideal) 3.

This is the multiplex we built....

This is our current circuit we're working on. The "multiplexer" chip below is the one we built in the picture above.

Answer 1