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-25 -20 -15 - -10 VA (volts) From the figure above find the following for a silicon N+P diode, Area 3.72x10–3 cm? (a) Built-in potential, (b) Doping of low doped region, (c) doping of high doped region.

Answer 1

Any vacation of the charge within a p-0 diode with an applied voltage Variation yields a Cracitance which must be added to the circut model of D-D diode. The capacitance associated with the charge raciafón in the depletion layer is called juhiên copacitance, while the capacitance associated with the excess carriers in the quast-neuteal region is called the diffusion capacitance. The juuchon capaltance The function capacélance ile alculated using the expassion for the parallel plate capacitance. This might af frist deen unenpected once the charge is disfubated through out the depletón Cayer. How ever when applying small voltage rauations one fuds that change is only adoled and removed at the edge of the depletion region so the capacitance simply depends on the delectue constant, the area and the depletion width c = (a & Nand (61-Vq) Na + Nd Bo the bu'lf in potential. to charge density.

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