Question

Question 1 Figure 1 shows a datapath for R-type instructions which consits of a register file and an arithmetic logic unit (ALU). These instructions are also known as aritmetic-logical- instructions since they perform aritmetic or logical operations. The register file contains all the registers and provides two read ports and one write port. The register file always provides the contents of the registers corresponding to the read register inputs on the outputs, while the writes must be explicitly controlled with the write control signal. The inputs carrying the register number to the register file are all 5 bits wide, whereas the lines carrying data values are 32 bits wide. The operation to be performed by the ALU is controlled with the ALU operation signal (ALU_OP), which will be 3 bits wide. ALU OP A ALU RESULTS REGISTERS READ REGISTER READ READ DATA1 REGISTER 2 WRITE REGISTER READ WRITE DATA 2 DATA INSTRUCTION ALU -В ALU FLAGS WRITE WRITE Figure 1: Datapath for R-type instruction 1 (a) Explain the function of the register file. (b) Explain the function of the arithmetic logic unit (ALU). (c) Determine the number of registers inside the register file. (d) Determine the maximum number of operations can be performed by the ALU.

Answer 1

A. Explain the functions of the register file:-

the execution datapaths for the R-type instructions. we need to model the register file and the module that performs the calculations that are required by the instructions. the register file contains 32 registers labeled R0, R1,..., R31; each register being 32-bits wide. Out of these, R0 and R31 are special registers. R0 always reads as 0; any data written to it is discarded. R31 is a special register used for the JAL and JALR instructions. The remaining registers are general purpose, and are primarily used for executing instructions. The various input and output ports of the required register file.RD is the selection vector for the destination register, and D is the data to be stored in the destination vector. RD1 and RD2 are the selection vectors for the registers that are to appear on buses A and B respectively. WE is the “Write Enable” bit - changes are allowed in the contents of the file only when this bit is set high. Clk is the clock input for the synchronous operation of the register file.

B. Explain the functions of the arithmetic logic unit:-

The arithmetic logic unit is a combinatorial module that performs the integer and logical calculations required by the instruction set. Its inputs are a set of operands and a function code supplied by the control unit, and it gives the result as an output. Generally, the design of an efficient arithmetic logic unit is very complicated. To keep the experiment simple, we shall forgo the requirement of performance and design a simple arithmetic logic unit that meets the minimum specifications of the instruction set.

C. Determine the number of registers inside the register file:-

two registers are available inside the register file. The registers are stored in a structure called a register file. Which can be read or updated by specifying the appropriate register number. There are two read input ports since we could read two registers in one instruction and one write input port specifying the register number since at most one register will be updated. There are three inputs that are 5 bits wide, which allows one of 32 registers to be specified. There is also one input data port that will contain the data to be written. There are two output ports containing the values of the registers specified to be read. These three ports are 32 bits wide since they contain data. Values are always read, but a write may not always occur. Thus, we need a write control signal.

D. Determine the maximum number of operations can be performed by the ALU:-

The ALU takes two 32-bit inputs and generates one 32-bit output. The control signal is 3-bits wide in this implementation to specify the appropriate operation to be performed.there are 9 different instructions, some ALU operations will be used for several instructions. The zero output will be used on a beq instruction. We need both read and write signals could read, write, or neither when instruction does not reference memory need a 32-bit address and data input ports data for stores and a 32-bit output port for loads. Also, need to sign extend a 16-bit offset value to 32 bits before it is input to the ALU. Thus, the offset can be positive or negative often negative offset from the frame pointer.