Question

VERILOG

Three Minute Alarm

A three minute alarm can constructed with two counters and two comparators. The counter's have an enable input that must be 1 for the count to increment. The counters can be set to 0 with the reset port. The counter for seconds is connected to a comparator that looks for 59. This comparator should be used to enable the minute counter, and reset the second's counter. The minute counter is connected to a comparator looking for 3. Use behavioural Verilog for the comparators. The comparator connected to the minute counter should drive the threemin net.

module counter #(parameter N=4) (
output logic [N-1:0] count,
input logic clk, enable, reset );

// complete using behaviour verilog
endmodule

module alarm(
output logic [1:0] minutes,
output logic [5:0] seconds,
output logic threemin,
input logic clk, reset );

// complete using counter

endmodule

Answer 1

module seconds_counter #(parameter N=6)(output [N-1:0] count, input clk, enable, reset);

reg [N-1:0] r;

initial begin

r <= 6'd0;

end

always @ (posedge clk, enable, reset)

begin

if (reset)

r <= 6'd0;

else

if (enable)

r <= r + 1'b1;

end

assign count = r;

endmodule

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

module minute_counter #(parameter N=2)(output [N-1:0] count, input clk, enable, reset);

reg [N-1:0] r;

initial begin

r <= 6'd0;

end

always @ (posedge clk, enable, reset)

begin

if (reset)

r <= 6'd0;

else

if (enable)

r <= r + 1'b1;

end

assign count = r;

endmodule

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

module alarm ( output [1:0] minutes,

output [5:0] seconds,

output threemin,

input clk,

input reset);

wire reset_s, enable_m;

seconds_counter u0 (seconds, clk, enable, reset_s);

minute_counter u1 (minutes, clk, enable_m, reset);

assign reset_s = (seconds == 6'd59) ? 1'b1 : 1'b0 ;

assign enable_m = reset_s;

assign threemin = (minutes == 2'd3) ? 1'b1 : 1'b0 ;

endmodule

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