VHDL code for each sequence and a test bench for each sequence with lots of comments...

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VHDL code for each sequence and a test bench for each sequence with lots of comments...

VHDL code for each sequence and a test bench for each sequence with lots of comments so I can understand what you did please.

A 4 bit sequence in a non-overlapping fashion using a Moore machine. Sequence will be 1010

A 4 bit sequence in a non-overlapping fashion using a Mealy machine. Sequence will be 0101

A 5 bit sequence in an overlapping fashion using a Moore machine. Sequence will be 10111

A 5 bit sequence in an overlapping fashion using a Mealy machine. Sequence will be 11101

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VHDL code for each sequence and a test bench for each sequence with lots of comments...

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