Question

A surgeon activates the laser by pressing the button b. The laser should stay ON for 20 ns. A clock with time period of 5 ns is to be used for the design. Button b and clock is synchronized. Design a FSM for the controller that turns on the laser for exactly 20 ns once b-1 is detected. 10

Answer 1

We propose to design FSM controller as Mealy type.

State diagram is shown below.

State Equations are derived from state table.

State	PRESENT STATE		INPUT	NEXT STATE		D FLIP FLOP INPUT		OUTPUT
	Q1	Q0	b	Q1+	Q0+	D1	D0	LASER
S0	0	0	0	0	0	0	0	0
	0	0	1	0	1	0	1	1
S1	0	1	X	1	0	1	0	1
	0	1		1	0	1	0	1
S2	1	0	X	1	1	1	1	1
	1	0		1	1	1	1	1
S3	1	1	X	0	0	0	0	1
	1	1		0	0	0	0	1

Design is verified using VHDL Modelling

library ieee;

use ieee.std_logic_1164.all;

entity controller is

port ( clk, b : in std_logic;

laser : out std_logic

);

end controller;

architecture arch of controller is

type state is (S0, S1, S2, S3);

signal present_state, next_state : state;

begin

process (clk)

begin

if rising_edge (clk) then

present_state <= next_state;

end if;

end process;

process (present_state, b)

begin

case (present_state) is

when S0 => if (b = '1') then

next_state <= S1;

laser <= '1';

else

next_state <= S0;

laser <= '0';

end if;

when S1 => next_state <= S2; laser <= '1';

when S2 => next_state <= S3; laser <= '1';

when S3 => next_state <= S0; laser <= '1';

when others => next_state <= S0;

end case;

end process;

end arch;

--Simulation