A simple output stage for an NMOS op-amp is shown in Figure P13.38. Device M1 operates as...

A simple output stage for an NMOS op-amp is shown in Figure P13.38. Device M1 operates as a source follower. The bias voltages are V+ = 3 V and V- = –3 V. Transistor parameters are k'n = 100µA/V2,  Vtn– 0.4 V, and λ = 0.025 V-1. Assume that transistors M2-M5 are matched, (a) Determine the width-to-length ratios of transistors M2-M5 such that IDQ2 = 0.5 mA. (b) Determine the W/L ratio of M1 such that the voltage gain is 0.98. (c) If the output resistance of source υ1 is 10 kΩ, determine the output resistance of this output stage.