The BiFET diff-amp input stage in Figure P13.61 is biased at I01 – 1 mA. The JFET parameters are VP = 4 V, IDSS = 1 mA, and λ = 0.02 V-1. The bipolar transistor parameters are β = 200 and VA = 100 V. (a) For R1 = R2 = 500 Ω, determine the minimum load resistance RL such that a differential-mode voltage gain of AD = 500 is obtained in the input stage, (b) If Rl – 500 kΩ, determine the range of resistance values R1 = R2 such that a differential-mode voltage gain of Ad = 700 is obtained in this input stage.
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