A simple CMOS op-amp circuit is shown in Figure P13.30 with Iq = 100 µA. The transistor parameters are the same as given in Problem 13.29 except for the width-to-length ratios. The width-to-length ratios are (W/L)1,2 = 80, (W/L) = 25, and (W/L)4 = 100. (a) The circuit is to be designed such that and v0 = 0 for υ1 = υ2 = 0. (b) Determine the small-signal voltage gains (i) A2 = υ02/υ01, (ii) A2 = υu2/υ01, and (iii) A3 = υ0/υ02. (c) Find the overall small-signal voltage gain A = υ0/υd
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