Consider the three-stage CMOS op-amp in Figure 13.15. Design an all- NMOS transistor current source circuit to establish IQ1 = 150µA. The NMOS transistor parameters are k'n = 100µA/V2 and VTN = 0.5 V. Assume the minimum width-to-length ratio of any transistor is 2. Assume (W/L)10 = (W/L)11 = 20 as shown in the figure.
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