Consider the simple CMOS op-amp circuit in Figure P13.29 biased with IQ – 200µ A. The transistor parameters are
The transistor width-to-length ratios are (W/L)l,2 = 20, (W/L) = 50, and (W/L)4 = 40. (a) Design the circuit such that ID3 = 150/µA, ID4 = 200µ A, and v0 = 0 for υ1 = υ2 = 0. (b) Find the small-signal voltage gains (i) Ad = υ01/υd, (ii) A3 = υ02/υ02, and (iii) A3 =υ0/υ02. (c) Determine the overall small-signal voltage gain A = υ0/υd.
A simple CMOS op-amp circuit is shown in Figure P13.30 with Iq = 100
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