The circuit in Figure P13.39 is another form of an output stage for the CMOS op-amp shown...

The circuit in Figure P13.39 is another form of an output stage for the CMOS op-amp shown in Figure 13.15. Assume the same transistor parameters as given in Example 13.10. The width-to-length values of some transistors are given and the applied gate-to-source voltages of M5 and M9are shown, (a) What is the bias current IQ2.? (b) Determine the W/L ratios of M8p and M8p such that the quiescent currents in M6 and M7 are 25 µA.