The CMOS folded cascode amplifier in Figure 13.17 is to be redesigned to provide a differential voltage gain of 10,000. The biasing is the same as described in Problem 13.42. The transistor parameters are VTN = 0.5 V, and . Assume (W/L)p = 2.2(W/L)n where appropriate so that the electrical parameters of PMOS and NMOS devices are nearly identical.
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