Repeat Drill, substituting 74AHCT02s for the 74LS00s in U1, using constant 0 instead of constant 1 inputs to U1, and using typical rather than maximum timing for both U1 and U2.
Drill
Determine the exact maximum propagation delay from IN to OUT of the circuit in Figure for both LOW-to-HIGH and HIGH-to-LOW transitions, using the timing information given in Table 6-2. Repeat, using a single worst-case delay number for each gate, and compare and comment on your results.
Figure
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