Repeat Drill, substituting 74LS21s (with two inputs at constant 1) for the 74LS00s.
Drill
Determine the exact maximum propagation delay from IN to OUT of the circuit in Figure for both LOW-to-HIGH and HIGH-to-LOW transitions, using the timing information given in Table 6-2. Repeat, using a single worst-case delay number for each gate, and compare and comment on your results.
Figure
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