The depletion-load NMOS inverter shown in Figure 16.7(a) is biased at VDD = 3 V. The transistor parameters are k'n = 100/μA/V2, VTND = 0.4V, VTNL = -0.8 V, (W/L)D = 6, and (W/L)L = 2. (a) Determine v0 for v1 = 3 V. Neglect the body effect, (b) Determine the maximum current and maximum power dissipation in the inverter, (c) Find the transition points for the driver and load transistors.
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