Consider the three-input NOR logic gate in Figure P16.19. The transistor parameters are VTNL =-1 V and VTND = 0.5 V. The maximum value of v0 in its low state is to be 0.1 V. (a) Determine KD/KL. (b) The maximum power dissipation in the NOR logic gate is to be 0.1 mW. Determine the width-to-length ratios of the transistors, (c) Determine vo when vX = vY = vZ = 3V.
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