Consider the CMOS transmission gate in Figure 16.56(a). Assume transistor parameters of VT...

Consider the CMOS transmission gate in Figure 16.56(a). Assume transistor parameters of VTN=0.4 V and VTP = -0.4 V. When ɸ= 2.5 V, the input voltage V1 varies with time as v1 = 2.5 - 0.2t for Let v0(t = 0) = 2.5 V and assume CL = 0.2 pF. Determine the range of times that the NMOS and PMOS devices are conducting.