Problem

Consider the two-input NMOS NOR logic gate shown in Figure 16.11. Let VDD - 1.8 V. Assume...

Consider the two-input NMOS NOR logic gate shown in Figure 16.11. Let VDD - 1.8 V. Assume transistor parameters of k'n = 100μA/V2, VTND = 0.4 V, VTNL = -0.6 V, (W/L)D = 5, and (W/L)L = 1. Neglect the body effect. .

(a) Determine VOLwhen: (i) A = logic 1, B — logic 0, and (ii) A = B = logic 1.

(b) Calculate the power dissipation in the circuit for the input condition given in part

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