Consider the circuit shown in Figure P 16.69.The input voltage v1 is either 0.1 V or 2.5 V...

Consider the circuit shown in Figure P 16.69.The input voltage v1 is either 0.1 V or 2.5 V. Assume gate voltages of ϕ = 2.5 V. The threshold voltages are VTN = -0.6 V for M4 and VTN =0.4 V for all other transistors. The width-to-length ratios are 1 for and M2, and M4, and 5 for MA and MB. (a) What are the logic 1 values for  (b) Design the width-to-length ratios of M1 and M3 such that the logic0values of v01and v02 are0.1V