The NMOS transistors in the circuit shown in Figure P16.68 have parameters Kn= 0.2mA/V2, VTN= 0.5V, λ= 0, and γ = O. (a) For gate voltages of ϕ =2.5Y, determine the quasi-steady-state output voltage for (i) v1=0, (ii) v1=2.5 V, and (iii) v1=1.8V. (b) Repeat part (a) for gate voltages of ϕ =2.0V.
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