Consider the three-input CMOS NAND circuit in Figure PI6.47. Assume k'n= 2k'p and...

Consider the three-input CMOS NAND circuit in Figure PI6.47. Assume k'n= 2k'p and VTN = \ VTP\ = 0.8 V. (a) If vA = vB = 5 V, determine vcsuch that both and N3 and P3 biased in the saturation region when (W/L)P = 2(W/L)n . (State any assumptions you make.) (b) If vA = vB = vc = v1, de­termine the relationship between (W/L)P and (W/L)n such that V1= 2.5 V when all transistors are biased in the saturation region, (c) Using the results

of part (b) and assuming vA=vB=5V, determine vc such that both N3 and P3 are biased in the saturation region. (State any assumptions you make.)