Consider the CMOS RAM cell and data lines in Figure 16.76 with circuit and transistor para...

Consider the CMOS RAM cell and data lines in Figure 16.76 with circuit and transistor parameters described in Problem 16.90. Assume initially that Q = 0 and . Assume the row is selected with X = 2.5 V and assume the data lines, through a write cycle, are and D = 2.5 V. Determine the values of Q and just after the row select has been applied.