Problem

Consider the CMOS clocked circuit in Figure 16.44(b). Assume the effective capacitance at...

Consider the CMOS clocked circuit in Figure 16.44(b). Assume the effective capacitance at the v01 terminal is 25 fF. If the leakage current through the MNA and MNB transistors is ILeakage = 2pA when these tran­sistors and MP1 are cutoff, determine the time for which v01 will decay by 0.5V.

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