Consider a CMOS inverter, (a) Show that when the resistance of the NMOS device is approxim...

Consider a CMOS inverter, (a) Show that when the resistance of the NMOS device is approximately 1/[K'n(W/L)n(VDD-VTN)], and when the resistance of the PMOS device is approximately 1/[K'p(W/L)p(VDD+VTP)] (b) Using the results of part (a), determine the maximum current that the NMOS device can sink such that the output volt­age stays below 0.5 V, and determine the maximum current that the PMOS device can source such that the output voltage does not drop more than 0.5 V below VDD.